Subject: [PATCH v5 0/3] riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI From: Inochi Amaoto To: Chen Wang , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Inochi Amaoto , Guo Ren , Lad Prabhakar , Yangyu Chen , Anup Patel , Hal Feng , Geert Uytterhoeven Cc: Yixun Lan , Longbin Li , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Date: Thu, 31 Oct 2024 14:08:56 +0800 . Subject: [PATCH] ACPI: fix the warning reported by the sparse From: Yunhui Cui To: punit.agrawal@bytedance.com, catalin.marinas@arm.com, will@kernel.org, chenhuacai@kernel.org, kernel@xen0n.name, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, rafael@kernel.org, lenb@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, sudeep.holla@arm.com, guohanjun@huawei.com, prarit@redhat.com, gshan@redhat.com, cuiyunhui@bytedance.com, dwmw@amazon.co.uk, Jonathan.Cameron@huawei.com, liuwei09@cestc.cn, maobibo@loongson.cn, sunilvl@ventanamicro.com, alexghiti@rivosinc.com, haibo1.xu@intel.com, jeeheng.sia@starfivetech.com, x86@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org Date: Thu, 31 Oct 2024 19:20:30 +0800 . Subject: [GIT PULL] RISC-V soc fixes for v6.12-rc6 From: Conor Dooley To: soc@kernel.org Cc: conor@kernel.org, linux-riscv@lists.infradead.org Date: Thu, 31 Oct 2024 12:22:18 +0000 --===============2362360974524316130== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="kTm0+sFzuK+Ucblh" Content-Disposition: inline --kTm0+sFzuK+Ucblh Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hey Arnd, Please pull some fixes that I have accumulated for this cycle. Cheers, Conor. The following changes since commit 8e929cb546ee42c9a61d24fae60605e9e3192354: Linux 6.12-rc3 (2024-10-13 14:33:32 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-fixes-for-v6.12-rc6 for you to fetch changes up to 384f2024e1a100b9b977a697f5e7cb151b00550d: MAINTAINERS: invert Misc RISC-V SoC Support's pattern (2024-10-24 16:27:10 +0100) ---------------------------------------------------------------- RISC-V soc fixes for v6.12-rc6 StarFive: Two minor dts fixes, one setting the correct eth phy delay parameters and one disabling unused nodes that caused warnings at probe time. Firmware: Fix the poll_complete() implementation in the auto-update driver so that it behaves as the framework expects. Misc: Update the maintainer pattern for my dts entry, so that it covers the specific platforms listed , rather than including all riscv platforms with the list platforms excluded. Signed-off-by: Conor Dooley ---------------------------------------------------------------- Conor Dooley (3): firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors riscv: dts: starfive: disable unused csi/camss nodes MAINTAINERS: invert Misc RISC-V SoC Support's pattern E Shattow (1): riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64 MAINTAINERS | 10 +++--- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 2 -- .../boot/dts/starfive/jh7110-pine64-star64.dts | 3 +- drivers/firmware/microchip/mpfs-auto-update.c | 42 ++++------------------ 4 files changed, 12 insertions(+), 45 deletions(-) --kTm0+sFzuK+Ucblh Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZyN2egAKCRB4tDGHoIJi 0l8BAPwM5TGTM2+fHKZL9/2adoAeE49F75k6RB4gH04AoCG9PgD/V/QzcxcfGFkI KjoZYDFLg8MVrgoyz/hxMELOmbij4w8= =65OL -----END PGP SIGNATURE----- --kTm0+sFzuK+Ucblh-- --===============2362360974524316130== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============2362360974524316130==-- . Subject: [PATCH v2] cpuidle: riscv-sbi: fix device node release in early exit of for_each_possible_cpu From: Javier Carrasco To: Anup Patel , "Rafael J. Wysocki" , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra Cc: Palmer Dabbelt , linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Javier Carrasco Date: Thu, 31 Oct 2024 13:21:17 +0100 . Subject: [PATCH v5 0/3] Introduce support for T-head TH1520 Mailbox From: Michal Wilczynski To: drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, m.szyprowski@samsung.com, samuel.holland@sifive.com, emil.renner.berthing@canonical.com Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Michal Wilczynski Date: Thu, 31 Oct 2024 21:47:20 +0100 .