Date: Thu, 31 Oct 2024 12:22:18 +0000 From: Conor Dooley To: soc@kernel.org Cc: conor@kernel.org, linux-riscv@lists.infradead.org Subject: [GIT PULL] RISC-V soc fixes for v6.12-rc6 --===============2362360974524316130== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="kTm0+sFzuK+Ucblh" Content-Disposition: inline --kTm0+sFzuK+Ucblh Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hey Arnd, Please pull some fixes that I have accumulated for this cycle. Cheers, Conor. The following changes since commit 8e929cb546ee42c9a61d24fae60605e9e3192354: Linux 6.12-rc3 (2024-10-13 14:33:32 -0700) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-fixes-for-v6.12-rc6 for you to fetch changes up to 384f2024e1a100b9b977a697f5e7cb151b00550d: MAINTAINERS: invert Misc RISC-V SoC Support's pattern (2024-10-24 16:27:10 +0100) ---------------------------------------------------------------- RISC-V soc fixes for v6.12-rc6 StarFive: Two minor dts fixes, one setting the correct eth phy delay parameters and one disabling unused nodes that caused warnings at probe time. Firmware: Fix the poll_complete() implementation in the auto-update driver so that it behaves as the framework expects. Misc: Update the maintainer pattern for my dts entry, so that it covers the specific platforms listed , rather than including all riscv platforms with the list platforms excluded. Signed-off-by: Conor Dooley ---------------------------------------------------------------- Conor Dooley (3): firmware: microchip: auto-update: fix poll_complete() to not report spurious timeout errors riscv: dts: starfive: disable unused csi/camss nodes MAINTAINERS: invert Misc RISC-V SoC Support's pattern E Shattow (1): riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64 MAINTAINERS | 10 +++--- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 2 -- .../boot/dts/starfive/jh7110-pine64-star64.dts | 3 +- drivers/firmware/microchip/mpfs-auto-update.c | 42 ++++------------------ 4 files changed, 12 insertions(+), 45 deletions(-) --kTm0+sFzuK+Ucblh Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZyN2egAKCRB4tDGHoIJi 0l8BAPwM5TGTM2+fHKZL9/2adoAeE49F75k6RB4gH04AoCG9PgD/V/QzcxcfGFkI KjoZYDFLg8MVrgoyz/hxMELOmbij4w8= =65OL -----END PGP SIGNATURE----- --kTm0+sFzuK+Ucblh-- --===============2362360974524316130== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============2362360974524316130==-- . Date: Fri, 01 Nov 2024 07:55:27 -0700 (PDT) From: Palmer Dabbelt To: Linus Torvalds Subject: [GIT PULL] RISC-V Fixes for 6.11-rc6 --===============7614743097933767828== Content-Type: text/plain The following changes since commit cfb10de18538e383dbc4f3ce7f477ce49287ff3d: riscv: Fix kernel stack size when KASAN is enabled (2024-10-01 13:08:11 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-rc6 for you to fetch changes up to 5f153a692bacc295f213e2c632ca557979fad7be: Merge commit 'bf40167d54d5' into fixes (2024-10-25 06:18:43 -0700) ---------------------------------------------------------------- RISC-V Fixes for 6.11-rc6 * A fix that avoids accessing the early boot ACPI tables via unsafe memory attributes, which can result in incorrect ACPI table data appearing. This can cause all sorts of bad behavior. * A fix to avoid compiler-insert library calls in the VDSO. * GCC+Rust builds have been disabled, to avoid issues related to ISA string mismatched between the GCC and LLVM Rust implementations. * The NX flag is now set in the EFI PE/COFF headers, which is necessary for some distro GRUB versions to boot images. * A fix to avoid leaking DT node reference counts on ACPI systems during cache info parsing. * CPU numbers are now printed as unsigned values during hotplug. * A pair of build fixes for usused macros, which can trigger warnings on some configurations. ---------------------------------------------------------------- Alexandre Ghiti (2): riscv: vdso: Prevent the compiler from inserting calls to memset() riscv: Do not use fortify in early code Chunyan Zhang (2): riscv: Remove unused GENERATING_ASM_OFFSETS riscv: Remove duplicated GET_RM Conor Dooley (1): RISC-V: disallow gcc + rust builds Heinrich Schuchardt (1): riscv: efi: Set NX compat flag in PE/COFF header Miquel Sabaté Solà (1): riscv: Prevent a bad reference count on CPU nodes Palmer Dabbelt (1): Merge commit 'bf40167d54d5' into fixes WangYuli (1): riscv: Use '%u' to format the output of 'cpu' Yunhui Cui (1): RISC-V: ACPI: fix early_ioremap to early_memremap Documentation/rust/arch-support.rst | 2 +- arch/riscv/Kconfig | 2 +- arch/riscv/errata/Makefile | 6 ++++++ arch/riscv/kernel/Makefile | 5 +++++ arch/riscv/kernel/acpi.c | 4 ++-- arch/riscv/kernel/asm-offsets.c | 2 -- arch/riscv/kernel/cacheinfo.c | 7 +++++-- arch/riscv/kernel/cpu-hotplug.c | 2 +- arch/riscv/kernel/efi-header.S | 2 +- arch/riscv/kernel/pi/Makefile | 6 +++++- arch/riscv/kernel/traps_misaligned.c | 2 -- arch/riscv/kernel/vdso/Makefile | 1 + 12 files changed, 28 insertions(+), 13 deletions(-) --===============7614743097933767828== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============7614743097933767828==-- . Date: Wed, 6 Nov 2024 09:12:30 +0800 From: Chen Wang To: soc@kernel.org Cc: Conor Dooley , Arnd Bergmann , Inochi Amaoto , linux-riscv , Xiaoguang Xing , Chao Wei , Liu Gui , Thomas Bonnefille Subject: [GIT PULL] RISC-V Sophgo Devicetrees for v6.13 SGV5IEFybmQsCgpQbGVhc2UgcHVsbCBkdCBjaGFuZ2VzIGZvciBSSVNDLVYvU29waGdvLgoKVGhh bmtzLApDaGVuLgoKVGhlIGZvbGxvd2luZyBjaGFuZ2VzIHNpbmNlIGNvbW1pdCA5ODUyZDg1ZWM5 ZDQ5MmViZWY1NmRjNWYyMjk0MTZjOTI1NzU4ZWRjOgoKIMKgIExpbnV4IDYuMTItcmMxICgyMDI0 LTA5LTI5IDE1OjA2OjE5IC0wNzAwKQoKYXJlIGF2YWlsYWJsZSBpbiB0aGUgR2l0IHJlcG9zaXRv cnkgYXQ6CgogwqAgaHR0cHM6Ly9naXRodWIuY29tL3NvcGhnby9saW51eC5naXQgdGFncy9yaXNj di1zb3BoZ28tZHQtZm9yLXY2LjEzCgpmb3IgeW91IHRvIGZldGNoIGNoYW5nZXMgdXAgdG8gYjVj ZjY1Y2MwZmQwMGFhMzBmZjIxOGVjODE3MGRkNDhlM2NiZTc4ZDoKCiDCoCByaXNjdjogZHRzOiBz b3BoZ286IEFkZCBlbW1jIHN1cHBvcnQgZm9yIEh1YXNoYW4gUGkgKDIwMjQtMTEtMDIgCjE5OjE5 OjA4ICswODAwKQoKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLQpSSVNDLVYgRGV2aWNldHJlZXMgZm9yIHY2LjEzCgpTb3BoZ286 CkFkZCBwaW5jdHJsIHN1cHBvcnQgZm9yIENWMTgwMEIgJiBDVjE4MTJILgpBZGQgU0FSQURDIHN1 cHBvcnQgZm9yIENWMTgwMEIuCkFkZCBpbml0aWFsIExpY2hlZVJWLU5hbm8vU0cyMDAyLgpBZGQg ZW1tYy9zZGlvIHN1cHBvcnQgZm9yIEh1YXNoYW4tUGkvQ1YxODEySC4KQWRkIHBvd2VyLWtleSBz dXBwb3J0IGZvciBQaW9uZWVyQm94L1NHMjA0Mi4KClNpZ25lZC1vZmYtYnk6IENoZW4gV2FuZyA8 dW5pY29ybl93YW5nQG91dGxvb2suY29tPgoKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQpDaGVuIFdhbmcgKDEpOgogwqDCoMKg wqDCoCByaXNjdjogc29waGdvOiBkdHM6IGFkZCBwb3dlciBrZXkgZm9yIHBpb25lZXIgYm94CgpJ bm9jaGkgQW1hb3RvICg0KToKIMKgwqDCoMKgwqAgcmlzY3Y6IGR0czogc29waGdvOiBjdjE4MDBi OiBhZGQgcGluY3RybCBzdXBwb3J0CiDCoMKgwqDCoMKgIHJpc2N2OiBkdHM6IHNvcGhnbzogY3Yx ODEyaDogYWRkIHBpbmN0cmwgc3VwcG9ydAogwqDCoMKgwqDCoCByaXNjdjogZHRzOiBzb3BoZ286 IEFkZCBzZGlvIGNvbmZpZ3VyYXRpb24gZm9yIEh1YXNoYW4gUGkKIMKgwqDCoMKgwqAgcmlzY3Y6 IGR0czogc29waGdvOiBBZGQgZW1tYyBzdXBwb3J0IGZvciBIdWFzaGFuIFBpCgpUaG9tYXMgQm9u bmVmaWxsZSAoNCk6CiDCoMKgwqDCoMKgIHJpc2N2OiBkdHM6IHNvcGhnbzogQWRkIGluaXRpYWwg U0cyMDAyIFNvQyBkZXZpY2UgdHJlZQogwqDCoMKgwqDCoCByaXNjdjogZHRzOiBzb3BoZ286IEFk ZCBMaWNoZWVSViBOYW5vIGJvYXJkIGRldmljZSB0cmVlCiDCoMKgwqDCoMKgIHJpc2N2OiBkdHM6 IHNvcGhnbzogQWRkIFNBUkFEQyBkZXNjcmlwdGlvbiBmb3IgU29waGdvIENWMTgwMEIKIMKgwqDC oMKgwqAgcmlzY3Y6IGR0czogc29waGdvOiBmaXggcGluY3RybCBiYXNlLWFkZHJlc3MKCiDCoGFy Y2gvcmlzY3YvYm9vdC9kdHMvc29waGdvL01ha2VmaWxlwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgIHzCoCAxICsKIMKgYXJjaC9yaXNjdi9ib290L2R0cy9zb3BoZ28vY3YxODAw Yi1taWxrdi1kdW8uZHRzwqDCoMKgwqDCoCB8IDQ5IAorKysrKysrKysrKysrKysrKysrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrCiDCoGFyY2gvcmlzY3YvYm9vdC9kdHMvc29waGdvL2N2 MTgwMGIuZHRzacKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgfCAxMCArKysrKysrKysrCiDC oGFyY2gvcmlzY3YvYm9vdC9kdHMvc29waGdvL2N2MTgxMmgtaHVhc2hhbi1waS5kdHPCoMKgwqDC oCB8IDIzIAorKysrKysrKysrKysrKysrKysrKysrKwogwqBhcmNoL3Jpc2N2L2Jvb3QvZHRzL3Nv cGhnby9jdjE4MTJoLmR0c2nCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHwgMTEgKysrKysr KysrKysKIMKgYXJjaC9yaXNjdi9ib290L2R0cy9zb3BoZ28vY3YxODF4LmR0c2nCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqAgfCAyMSAKKysrKysrKysrKysrKysrKysrKysrCiDCoGFyY2gv cmlzY3YvYm9vdC9kdHMvc29waGdvL2N2MTh4eC5kdHNpwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgIHwgMzIgCisrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrCiDCoGFyY2gvcmlz Y3YvYm9vdC9kdHMvc29waGdvL3NnMjAwMi1saWNoZWVydi1uYW5vLWIuZHRzIHwgOTUgCisrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrCiDCoGFyY2gvcmlzY3YvYm9vdC9kdHMv c29waGdvL3NnMjAwMi5kdHNpwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIHwgNDMgCisr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysKIMKgYXJjaC9yaXNjdi9i b290L2R0cy9zb3BoZ28vc2cyMDQyLW1pbGt2LXBpb25lZXIuZHRzwqDCoCB8IDE1ICsrKysrKysr KysrKysrKwogwqAxMCBmaWxlcyBjaGFuZ2VkLCAzMDAgaW5zZXJ0aW9ucygrKQogwqBjcmVhdGUg bW9kZSAxMDA2NDQgYXJjaC9yaXNjdi9ib290L2R0cy9zb3BoZ28vY3YxODF4LmR0c2kKIMKgY3Jl YXRlIG1vZGUgMTAwNjQ0IGFyY2gvcmlzY3YvYm9vdC9kdHMvc29waGdvL3NnMjAwMi1saWNoZWVy di1uYW5vLWIuZHRzCiDCoGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL3Jpc2N2L2Jvb3QvZHRzL3Nv cGhnby9zZzIwMDIuZHRzaQoKCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KbGludXgtcmlzY3YgbWFpbGluZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmlu ZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9s aW51eC1yaXNjdgo= .