Date: Tue, 6 Aug 2024 10:07:21 +0800
From: Pengfei Xu <pengfei.xu@intel.com>
To: <rrichter@amd.com>
Subject: [CXL] There is BUG: slab-out-of-bounds in cxl_setup_parent_dport in
 v6.10

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Date: Tue,  6 Aug 2024 04:15:47 +0000
From: Li Ming <ming4.li@intel.com>
To: linux-cxl@vger.kernel.org,
	rrichter@amd.com,
	terry.bowman@amd.com,
	dan.j.williams@intel.com
Cc: Li Ming <ming4.li@intel.com>
Subject: [PATCH 1/1] cxl/pci: Get AER capability address from RCRB only for RCH dport

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