Subject: [PATCH 0/2] Fixes for standard conformance From: Sergey Makarov To: Date: Wed, 11 Sep 2024 16:18:58 +0300 . Subject: [PATCH 0/5] hw/intc/loongarch_pch: Split into pic common and From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , Xianglai Li , qemu-devel@nongnu.org Date: Thu, 12 Sep 2024 10:35:32 +0800 . Subject: [PATCH v3 00/29] target/arm: AdvSIMD decodetree conversion, part 4 From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Date: Wed, 11 Sep 2024 19:40:45 -0700 . Subject: [PATCH] vfio/pci: Fix null pointer deference from error API From: Jim Shu To: qemu-devel@nongnu.org Cc: Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Jim Shu Date: Thu, 12 Sep 2024 13:17:34 +0800 . Subject: [PULL 00/47] riscv-to-apply queue From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Alistair Francis Date: Thu, 12 Sep 2024 15:29:05 +1000 The following changes since commit a4eb31c678400472de0b4915b9154a7c20d8332f: Merge tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/qemu into staging (2024-09-11 13:17:29 +0100) are available in the Git repository at: https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240912-1 for you to fetch changes up to 90d5d3c1115399d8e27621efd69dfa74a35a4932: hw/intc: riscv-imsic: Fix interrupt state updates. (2024-09-12 15:05:10 +1000) ---------------------------------------------------------------- RISC-V PR for 9.2 * Add a property to set vl to ceil(AVL/2) * Enable numamem testing for RISC-V * Consider MISA bit choice in implied rule * Fix the za64rs priv spec requirements * Enable Bit Manip for OpenTitan Ibex CPU * Fix the group bit setting of AIA with KVM * Stop timer with infinite timecmp * Add 'fcsr' register to QEMU log as a part of F extension * Fix riscv64 build on musl libc * Add preliminary textra trigger CSR functions * RISC-V IOMMU support * RISC-V bsd-user support * Respect firmware ELF entry point * Add Svvptc extension support * Fix masking of rv32 physical address * Fix linking problem with semihosting disabled * Fix IMSIC interrupt state updates ---------------------------------------------------------------- Alexandre Ghiti (1): target: riscv: Add Svvptc extension support Alistair Francis (1): target: riscv: Enable Bit Manip for OpenTitan Ibex CPU Alvin Chang (2): target/riscv: Preliminary textra trigger CSR writting support target/riscv: Add textra matching condition for the triggers Andrew Jones (3): target/riscv/kvm: Fix the group bit setting of AIA target/riscv: Stop timer with infinite timecmp target/riscv32: Fix masking of physical address Daniel Henrique Barboza (5): target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device test/qtest: add riscv-iommu-pci tests qtest/riscv-iommu-test: add init queues test docs/specs: add riscv-iommu Haibo Xu (3): tests/acpi: Add empty ACPI SRAT data file for RISC-V tests/qtest/bios-tables-test.c: Enable numamem testing for RISC-V tests/acpi: Add expected ACPI SRAT AML file for RISC-V Jason Chien (1): target/riscv: Add a property to set vl to ceil(AVL/2) Maria Klauchek (1): target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension Mark Corbin (15): bsd-user: Implement RISC-V CPU initialization and main loop bsd-user: Add RISC-V CPU execution loop and syscall handling bsd-user: Implement RISC-V CPU register cloning and reset functions bsd-user: Implement RISC-V TLS register setup bsd-user: Add RISC-V ELF definitions and hardware capability detection bsd-user: Define RISC-V register structures and register copying bsd-user: Add RISC-V signal trampoline setup function bsd-user: Implement RISC-V sysarch system call emulation bsd-user: Add RISC-V thread setup and initialization support bsd-user: Define RISC-V VM parameters and helper functions bsd-user: Define RISC-V system call structures and constants bsd-user: Define RISC-V signal handling structures and constants bsd-user: Implement RISC-V signal trampoline setup functions bsd-user: Implement 'get_mcontext' for RISC-V bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV Milan P. Stanić (1): util/util/cpuinfo-riscv.c: fix riscv64 build on musl libc Samuel Holland (1): hw/riscv: Respect firmware ELF entry point Thomas Huth (1): target/riscv/cpu_helper: Fix linking problem with semihosting disabled Tomasz Jeznach (9): exec/memtxattr: add process identifier to the transaction attributes hw/riscv: add riscv-iommu-bits.h hw/riscv: add RISC-V IOMMU base emulation hw/riscv: add riscv-iommu-pci reference device hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) hw/riscv/riscv-iommu: add ATS support hw/riscv/riscv-iommu: add DBG support hw/intc: riscv-imsic: Fix interrupt state updates. Vladimir Isaev (1): target/riscv: fix za64rs enabling Warner Losh (2): bsd-user: Add generic RISC-V64 target definitions bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files docs/specs/index.rst | 1 + docs/specs/pci-ids.rst | 2 + docs/specs/riscv-iommu.rst | 90 ++ docs/system/riscv/virt.rst | 13 + configs/targets/riscv64-bsd-user.mak | 4 + meson.build | 1 + bsd-user/riscv/target.h | 20 + bsd-user/riscv/target_arch.h | 27 + bsd-user/riscv/target_arch_cpu.h | 147 ++ bsd-user/riscv/target_arch_elf.h | 42 + bsd-user/riscv/target_arch_reg.h | 88 ++ bsd-user/riscv/target_arch_signal.h | 75 + bsd-user/riscv/target_arch_sigtramp.h | 42 + bsd-user/riscv/target_arch_sysarch.h | 41 + bsd-user/riscv/target_arch_thread.h | 47 + bsd-user/riscv/target_arch_vmparam.h | 53 + bsd-user/riscv/target_syscall.h | 38 + hw/riscv/riscv-iommu-bits.h | 421 +++++ hw/riscv/riscv-iommu.h | 149 ++ hw/riscv/trace.h | 1 + include/exec/memattrs.h | 5 + include/hw/pci/pci.h | 1 + include/hw/riscv/boot.h | 4 +- include/hw/riscv/iommu.h | 36 + target/riscv/cpu_bits.h | 10 + target/riscv/cpu_cfg.h | 2 + target/riscv/debug.h | 3 + tests/qtest/libqos/riscv-iommu.h | 101 ++ bsd-user/riscv/signal.c | 170 ++ bsd-user/riscv/target_arch_cpu.c | 29 + hw/intc/riscv_imsic.c | 50 +- hw/riscv/boot.c | 11 +- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/opentitan.c | 3 +- hw/riscv/riscv-iommu-pci.c | 202 +++ hw/riscv/riscv-iommu.c | 2431 +++++++++++++++++++++++++++++ hw/riscv/shakti_c.c | 13 +- hw/riscv/sifive_u.c | 4 +- hw/riscv/spike.c | 5 +- hw/riscv/virt.c | 37 +- target/riscv/cpu.c | 16 +- target/riscv/cpu_helper.c | 8 +- target/riscv/debug.c | 114 +- target/riscv/kvm/kvm-cpu.c | 4 +- target/riscv/tcg/tcg-cpu.c | 13 +- target/riscv/time_helper.c | 1 + target/riscv/vector_helper.c | 2 + tests/qtest/bios-tables-test.c | 28 + tests/qtest/libqos/riscv-iommu.c | 76 + tests/qtest/riscv-iommu-test.c | 220 +++ util/cpuinfo-riscv.c | 1 + hw/riscv/Kconfig | 4 + hw/riscv/meson.build | 1 + hw/riscv/trace-events | 17 + target/riscv/Kconfig | 4 +- tests/data/acpi/riscv64/virt/SRAT.numamem | Bin 0 -> 108 bytes tests/qtest/libqos/meson.build | 4 + tests/qtest/meson.build | 1 + 58 files changed, 4877 insertions(+), 58 deletions(-) create mode 100644 docs/specs/riscv-iommu.rst create mode 100644 configs/targets/riscv64-bsd-user.mak create mode 100644 bsd-user/riscv/target.h create mode 100644 bsd-user/riscv/target_arch.h create mode 100644 bsd-user/riscv/target_arch_cpu.h create mode 100644 bsd-user/riscv/target_arch_elf.h create mode 100644 bsd-user/riscv/target_arch_reg.h create mode 100644 bsd-user/riscv/target_arch_signal.h create mode 100644 bsd-user/riscv/target_arch_sigtramp.h create mode 100644 bsd-user/riscv/target_arch_sysarch.h create mode 100644 bsd-user/riscv/target_arch_thread.h create mode 100644 bsd-user/riscv/target_arch_vmparam.h create mode 100644 bsd-user/riscv/target_syscall.h create mode 100644 hw/riscv/riscv-iommu-bits.h create mode 100644 hw/riscv/riscv-iommu.h create mode 100644 hw/riscv/trace.h create mode 100644 include/hw/riscv/iommu.h create mode 100644 tests/qtest/libqos/riscv-iommu.h create mode 100644 bsd-user/riscv/signal.c create mode 100644 bsd-user/riscv/target_arch_cpu.c create mode 100644 hw/riscv/riscv-iommu-pci.c create mode 100644 hw/riscv/riscv-iommu.c create mode 100644 tests/qtest/libqos/riscv-iommu.c create mode 100644 tests/qtest/riscv-iommu-test.c create mode 100644 hw/riscv/trace-events create mode 100644 tests/data/acpi/riscv64/virt/SRAT.numamem . Subject: [PULL 0/5] target/sparc patch queue From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Date: Wed, 11 Sep 2024 22:30:38 -0700 The following changes since commit a4eb31c678400472de0b4915b9154a7c20d8332f: Merge tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/qemu into staging (2024-09-11 13:17:29 +0100) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-sparc-20240911 for you to fetch changes up to d2a0c3a7f7740a3d563c8c3ef1fffcc87a36213d: target/sparc: Add gen_trap_if_nofpu_fpexception (2024-09-11 19:54:55 -0700) ---------------------------------------------------------------- target/sparc: Implement single entry FP Queue ---------------------------------------------------------------- Carl Hauser (2): target/sparc: Add FQ and FSR.QNE target/sparc: Populate sparc32 FQ when raising fp exception Richard Henderson (3): target/sparc: Add FSR_QNE to tb_flags target/sparc: Implement STDFQ target/sparc: Add gen_trap_if_nofpu_fpexception target/sparc/cpu.h | 30 ++++++++++- target/sparc/fop_helper.c | 4 ++ target/sparc/int32_helper.c | 40 ++++++++------ target/sparc/machine.c | 25 +++++++++ target/sparc/translate.c | 128 ++++++++++++++++++++++++++++++++------------ target/sparc/insns.decode | 2 +- 6 files changed, 178 insertions(+), 51 deletions(-) . Subject: Gitlab CI caching is not working From: Thomas Huth To: Paolo Bonzini , QEMU Developers Cc: Peter Maydell , Stefan Hajnoczi , "Daniel P. Berrange" , Richard Henderson Date: Thu, 12 Sep 2024 07:38:37 +0200 . Subject: [PATCH] accel/kvm: refactor dirty ring setup From: Ani Sinha To: Paolo Bonzini Cc: Ani Sinha , kvm@vger.kernel.org, qemu-devel@nongnu.org Date: Thu, 12 Sep 2024 11:48:38 +0530 . Subject: [RFC PATCH] ppc/spapr: Change printf format to %HWADDR_PRId for MIN_RMA_SLOF From: Aditya Gupta To: , Cc: Nicholas Piggin , Madhavan Srinivasan Date: Thu, 12 Sep 2024 12:22:07 +0530 . Subject: [PULL v2 00/61] Misc HW & UI patches for 2024-09-12 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Thu, 12 Sep 2024 08:52:14 +0200 v2: - Fill Pierrick's commit description suggested by Eric Blake - Include TMP105 fixes from Guenter The following changes since commit a4eb31c678400472de0b4915b9154a7c20d8332f: Merge tag 'pull-testing-gdbstub-oct-100924-1' of https://gitlab.com/stsquad/qemu into staging (2024-09-11 13:17:29 +0100) are available in the Git repository at: https://github.com/philmd/qemu.git tags/hw-misc-20240912 for you to fetch changes up to bd480a2baab659abe90da878bc955670691f53a8: ui: remove break after g_assert_not_reached() (2024-09-12 08:44:48 +0200) ---------------------------------------------------------------- Misc HW & UI patches - Remove deprecated SH4 SHIX machine TC58128 NAND EEPROM (Phil) - Remove deprecated CRIS target (Phil) - Remove deprecated RISC-V 'any' CPU type (Phil) - Add fifo8_peek_buf() to correctly handle FIFO wraparound (Mark) - Minor cleanups in Designware PCIe, PL011 and loongson IPI models (Phil) - Fixes in TI TMP105 temperature (Guenter) - Convert Sun ESCC and ADB mouses to QemuInputHandler (Mark) - Prevent heap overflow in VIRTIO sound device (Volker) - Cleanups around g_assert_not_reached() call (Pierrick) - Add Clément as VT-d reviewer (Clément) - Prevent stuck modifier keys and unexpected text input on Windows (Volker) - Explicitly set SDL2 swap interval when OpenGL is enabled (Gert) ---------------------------------------------------------------- CLEMENT MATHIEU--DRIF (1): MAINTAINERS: Add myself as a reviewer of VT-d Gert Wollny (1): ui/sdl2: set swap interval explicitly when OpenGL is enabled Guenter Roeck (2): hw/sensor/tmp105: Coding style fixes hw/sensor/tmp105: Lower 4 bit of limit registers are always 0 Mark Cave-Ayland (11): fifo8: rename fifo8_peekpop_buf() to fifo8_peekpop_bufptr() fifo8: introduce head variable for fifo8_peekpop_bufptr() fifo8: add skip parameter to fifo8_peekpop_bufptr() fifo8: replace fifo8_pop_bufptr() with fifo8_peekpop_bufptr() in fifo8_pop_buf() fifo8: rename fifo8_pop_buf() to fifo8_peekpop_buf() fifo8: honour do_pop argument in fifo8_peekpop_buf() fifo8: add fifo8_peek_buf() function fifo8: introduce fifo8_peek() function tests/unit: add test-fifo unit test hw/char/escc: convert Sun mouse to use QemuInputHandler hw/input/adb-mouse: convert to use QemuInputHandler Philippe Mathieu-Daudé (35): hw/pci-host/designware: Declare CPU QOM types using DEFINE_TYPES() macro hw/pci-host/designware: Add 'host_mem' variable for clarity hw/intc/loongson_ipi: Remove unused headers hw/sh4: Remove the deprecated SHIX machine hw/block: Remove TC58128 NAND EEPROM hw/sh4: Remove sh7750_register_io_device() helper tests/tcg: Remove CRIS libc test files tests/tcg: Remove CRIS bare test files buildsys: Remove CRIS cross container linux-user: Remove support for CRIS target hw/cris: Remove the axis-dev88 machine hw/cris: Remove image loader helper hw/intc: Remove TYPE_ETRAX_FS_PIC device hw/char: Remove TYPE_ETRAX_FS_SERIAL device hw/net: Remove TYPE_ETRAX_FS_ETH device hw/dma: Remove ETRAX_FS DMA device hw/timer: Remove TYPE_ETRAX_FS_TIMER device system: Remove support for CRIS target target/cris: Remove the deprecated CRIS target seccomp: Remove check for CRIS host target/riscv: Remove the deprecated 'any' CPU type hw/char/pl011: Remove unused 'readbuff' field hw/char/pl011: Move pl011_put_fifo() earlier hw/char/pl011: Move pl011_loopback_enabled|tx() around hw/char/pl011: Split RX/TX path of pl011_reset_fifo() hw/char/pl011: Extract pl011_write_txdata() from pl011_write() hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() hw/char/pl011: Warn when using disabled transmitter hw/char/pl011: Rename RX FIFO methods tests/unit: Strengthen FIFO8 tests tests/unit: Expand test_fifo8_peek_buf_wrap() coverage tests/unit: Comment FIFO8 tests hw/sensor/tmp105: Use registerfields API hw/sensor/tmp105: Pass 'oneshot' argument to tmp105_alarm_update() hw/sensor/tmp105: OS (one-shot) bit in config register always returns 0 Pierrick Bouvier (8): hw/char: replace assert(0) with g_assert_not_reached() hw/core: replace assert(0) with g_assert_not_reached() hw/watchdog: replace assert(0) with g_assert_not_reached() hw/gpio: remove break after g_assert_not_reached() hw/misc: remove break after g_assert_not_reached() hw/pci-host: remove break after g_assert_not_reached() system: replace assert(0) with g_assert_not_reached() ui: remove break after g_assert_not_reached() Volker Rümelin (3): hw/audio/virtio-sound: fix heap buffer overflow ui/sdl2: release all modifiers ui/sdl2: ignore GUI keys in SDL_TEXTINPUT handler MAINTAINERS | 24 +- docs/about/deprecated.rst | 27 - docs/about/emulation.rst | 4 - docs/about/removed-features.rst | 20 + docs/user/main.rst | 4 - configure | 4 - configs/devices/cris-softmmu/default.mak | 4 - configs/devices/sh4-softmmu/default.mak | 1 - configs/targets/cris-linux-user.mak | 1 - configs/targets/cris-softmmu.mak | 1 - qapi/machine.json | 2 +- hw/cris/boot.h | 16 - include/exec/poison.h | 1 - include/hw/char/escc.h | 3 + include/hw/char/pl011.h | 1 - include/hw/cris/etraxfs.h | 54 - include/hw/cris/etraxfs_dma.h | 36 - include/hw/pci-host/designware.h | 2 - include/hw/sh4/sh.h | 19 - include/qemu/fifo8.h | 25 + include/sysemu/arch_init.h | 1 - include/ui/sdl2.h | 2 + include/user/abitypes.h | 7 - linux-user/cris/sockbits.h | 1 - linux-user/cris/syscall_nr.h | 367 -- linux-user/cris/target_cpu.h | 45 - linux-user/cris/target_elf.h | 14 - linux-user/cris/target_errno_defs.h | 7 - linux-user/cris/target_fcntl.h | 11 - linux-user/cris/target_mman.h | 13 - linux-user/cris/target_prctl.h | 1 - linux-user/cris/target_proc.h | 1 - linux-user/cris/target_resource.h | 1 - linux-user/cris/target_signal.h | 9 - linux-user/cris/target_structs.h | 1 - linux-user/cris/target_syscall.h | 46 - linux-user/cris/termbits.h | 225 -- linux-user/syscall_defs.h | 7 +- target/cris/cpu-param.h | 16 - target/cris/cpu-qom.h | 32 - target/cris/cpu.h | 286 -- target/cris/crisv10-decode.h | 112 - target/cris/crisv32-decode.h | 133 - target/cris/helper.h | 23 - target/cris/mmu.h | 22 - target/cris/opcode-cris.h | 355 -- target/riscv/cpu-qom.h | 1 - tests/tcg/cris/libc/crisutils.h | 76 - tests/tcg/cris/libc/sys.h | 18 - hw/audio/virtio-snd.c | 24 - hw/block/tc58128.c | 211 -- hw/char/avr_usart.c | 2 +- hw/char/escc.c | 92 +- hw/char/etraxfs_ser.c | 267 -- hw/char/pl011.c | 209 +- hw/core/numa.c | 2 +- hw/cris/axis_dev88.c | 351 -- hw/cris/boot.c | 102 - hw/dma/etraxfs_dma.c | 781 ---- hw/gpio/nrf51_gpio.c | 1 - hw/input/adb-mouse.c | 63 +- hw/intc/etraxfs_pic.c | 172 - hw/intc/loongson_ipi.c | 9 - hw/misc/imx6_ccm.c | 1 - hw/misc/mac_via.c | 2 - hw/net/etraxfs_eth.c | 688 ---- hw/pci-host/designware.c | 44 +- hw/pci-host/gt64120.c | 2 - hw/sensor/tmp105.c | 66 +- hw/sh4/sh7750.c | 57 +- hw/sh4/shix.c | 86 - hw/timer/etraxfs_timer.c | 407 --- hw/watchdog/watchdog.c | 2 +- linux-user/cris/cpu_loop.c | 95 - linux-user/cris/signal.c | 194 - linux-user/elfload.c | 15 - linux-user/syscall.c | 10 +- system/qemu-seccomp.c | 4 +- system/rtc.c | 2 +- target/cris/cpu.c | 323 -- target/cris/gdbstub.c | 127 - target/cris/helper.c | 287 -- target/cris/machine.c | 93 - target/cris/mmu.c | 356 -- target/cris/op_helper.c | 580 --- target/cris/translate.c | 3252 ----------------- target/riscv/cpu.c | 28 - tests/qtest/machine-none-test.c | 1 - tests/tcg/cris/bare/sys.c | 63 - tests/tcg/cris/libc/check_abs.c | 40 - tests/tcg/cris/libc/check_addc.c | 58 - tests/tcg/cris/libc/check_addcm.c | 85 - tests/tcg/cris/libc/check_addo.c | 125 - tests/tcg/cris/libc/check_addoq.c | 44 - tests/tcg/cris/libc/check_bound.c | 142 - tests/tcg/cris/libc/check_ftag.c | 37 - .../cris/libc/check_gcctorture_pr28634-1.c | 15 - .../tcg/cris/libc/check_gcctorture_pr28634.c | 15 - .../tcg/cris/libc/check_glibc_kernelversion.c | 116 - tests/tcg/cris/libc/check_hello.c | 7 - tests/tcg/cris/libc/check_int64.c | 47 - tests/tcg/cris/libc/check_lz.c | 49 - tests/tcg/cris/libc/check_mapbrk.c | 39 - tests/tcg/cris/libc/check_mmap1.c | 48 - tests/tcg/cris/libc/check_mmap2.c | 48 - tests/tcg/cris/libc/check_mmap3.c | 33 - tests/tcg/cris/libc/check_moveq.c | 51 - tests/tcg/cris/libc/check_openpf1.c | 38 - tests/tcg/cris/libc/check_openpf2.c | 16 - tests/tcg/cris/libc/check_openpf3.c | 49 - tests/tcg/cris/libc/check_openpf5.c | 56 - tests/tcg/cris/libc/check_settls1.c | 45 - tests/tcg/cris/libc/check_sigalrm.c | 26 - tests/tcg/cris/libc/check_stat1.c | 16 - tests/tcg/cris/libc/check_stat2.c | 20 - tests/tcg/cris/libc/check_stat3.c | 25 - tests/tcg/cris/libc/check_stat4.c | 27 - tests/tcg/cris/libc/check_swap.c | 76 - tests/tcg/cris/libc/check_time2.c | 18 - tests/unit/test-fifo.c | 449 +++ ui/qemu-pixman.c | 1 - ui/sdl2-input.c | 5 + ui/sdl2.c | 19 +- util/fifo8.c | 42 +- fpu/softfloat-specialize.c.inc | 4 +- target/cris/translate_v10.c.inc | 1262 ------- .gitlab-ci.d/buildtest.yml | 2 +- .gitlab-ci.d/container-cross.yml | 5 - .gitlab-ci.d/crossbuild-template.yml | 4 +- hw/Kconfig | 1 - hw/audio/trace-events | 1 - hw/block/Kconfig | 3 - hw/block/meson.build | 1 - hw/char/meson.build | 1 - hw/char/trace-events | 4 +- hw/cris/Kconfig | 11 - hw/cris/meson.build | 5 - hw/dma/meson.build | 1 - hw/intc/meson.build | 1 - hw/meson.build | 1 - hw/net/meson.build | 1 - hw/net/trace-events | 5 - hw/sh4/Kconfig | 7 - hw/sh4/meson.build | 1 - hw/timer/meson.build | 1 - scripts/coverity-scan/COMPONENTS.md | 3 - scripts/probe-gdb-support.py | 1 - target/Kconfig | 1 - target/cris/Kconfig | 2 - target/cris/meson.build | 17 - target/meson.build | 1 - tests/data/qobject/qdict.txt | 6 - tests/docker/Makefile.include | 1 - .../dockerfiles/fedora-cris-cross.docker | 14 - tests/tcg/cris/.gdbinit | 11 - tests/tcg/cris/Makefile.target | 62 - tests/tcg/cris/README | 1 - tests/tcg/cris/bare/check_addcv17.s | 65 - tests/tcg/cris/bare/check_addi.s | 57 - tests/tcg/cris/bare/check_addiv32.s | 62 - tests/tcg/cris/bare/check_addm.s | 96 - tests/tcg/cris/bare/check_addq.s | 47 - tests/tcg/cris/bare/check_addr.s | 96 - tests/tcg/cris/bare/check_addxc.s | 91 - tests/tcg/cris/bare/check_addxm.s | 106 - tests/tcg/cris/bare/check_addxr.s | 96 - tests/tcg/cris/bare/check_andc.s | 80 - tests/tcg/cris/bare/check_andm.s | 90 - tests/tcg/cris/bare/check_andq.s | 46 - tests/tcg/cris/bare/check_andr.s | 95 - tests/tcg/cris/bare/check_asr.s | 230 -- tests/tcg/cris/bare/check_ba.s | 93 - tests/tcg/cris/bare/check_bas.s | 102 - tests/tcg/cris/bare/check_bcc.s | 197 - tests/tcg/cris/bare/check_boundc.s | 101 - tests/tcg/cris/bare/check_boundr.s | 125 - tests/tcg/cris/bare/check_btst.s | 96 - tests/tcg/cris/bare/check_clearfv32.s | 19 - tests/tcg/cris/bare/check_clrjmp1.s | 36 - tests/tcg/cris/bare/check_cmp-2.s | 15 - tests/tcg/cris/bare/check_cmpc.s | 86 - tests/tcg/cris/bare/check_cmpm.s | 96 - tests/tcg/cris/bare/check_cmpq.s | 75 - tests/tcg/cris/bare/check_cmpr.s | 102 - tests/tcg/cris/bare/check_cmpxc.s | 92 - tests/tcg/cris/bare/check_cmpxm.s | 106 - tests/tcg/cris/bare/check_dstep.s | 42 - tests/tcg/cris/bare/check_jsr.s | 85 - tests/tcg/cris/bare/check_lapc.s | 78 - tests/tcg/cris/bare/check_lsl.s | 217 -- tests/tcg/cris/bare/check_lsr.s | 218 -- tests/tcg/cris/bare/check_mcp.s | 49 - tests/tcg/cris/bare/check_movdelsr1.s | 33 - tests/tcg/cris/bare/check_movecr.s | 37 - tests/tcg/cris/bare/check_movei.s | 50 - tests/tcg/cris/bare/check_movemr.s | 78 - tests/tcg/cris/bare/check_movemrv32.s | 96 - tests/tcg/cris/bare/check_mover.s | 28 - tests/tcg/cris/bare/check_moverm.s | 45 - tests/tcg/cris/bare/check_movmp.s | 131 - tests/tcg/cris/bare/check_movpmv32.s | 35 - tests/tcg/cris/bare/check_movpr.s | 28 - tests/tcg/cris/bare/check_movprv32.s | 21 - tests/tcg/cris/bare/check_movscr.s | 29 - tests/tcg/cris/bare/check_movsm.s | 44 - tests/tcg/cris/bare/check_movsr.s | 46 - tests/tcg/cris/bare/check_movucr.s | 33 - tests/tcg/cris/bare/check_movum.s | 40 - tests/tcg/cris/bare/check_movur.s | 45 - tests/tcg/cris/bare/check_mulv32.s | 51 - tests/tcg/cris/bare/check_mulx.s | 257 -- tests/tcg/cris/bare/check_neg.s | 104 - tests/tcg/cris/bare/check_not.s | 31 - tests/tcg/cris/bare/check_orc.s | 71 - tests/tcg/cris/bare/check_orm.s | 75 - tests/tcg/cris/bare/check_orq.s | 41 - tests/tcg/cris/bare/check_orr.s | 84 - tests/tcg/cris/bare/check_ret.s | 25 - tests/tcg/cris/bare/check_scc.s | 95 - tests/tcg/cris/bare/check_subc.s | 87 - tests/tcg/cris/bare/check_subm.s | 96 - tests/tcg/cris/bare/check_subq.s | 52 - tests/tcg/cris/bare/check_subr.s | 102 - tests/tcg/cris/bare/check_xarith.s | 72 - tests/tcg/cris/bare/crt.s | 13 - tests/tcg/cris/bare/testutils.inc | 117 - tests/unit/meson.build | 1 + 227 files changed, 865 insertions(+), 19137 deletions(-) delete mode 100644 configs/devices/cris-softmmu/default.mak delete mode 100644 configs/targets/cris-linux-user.mak delete mode 100644 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Subject: [PATCH v2 00/48] Use g_assert_not_reached instead of (g_)assert(0,false) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Jason Wang , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Laurent Vivier , Marcelo Tosatti , Nicholas Piggin , Klaus Jensen , WANG Xuerui , Halil Pasic , Rob Herring , Michael Rolnik , Zhao Liu , Peter Maydell , Richard Henderson , Fabiano Rosas , Corey Minyard , Keith Busch , Thomas Huth , "Maciej S. Szmigiero" , Harsh Prateek Bora , Kevin Wolf , Paolo Bonzini , Jesper Devantier , Hyman Huang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Palmer Dabbelt , qemu-s390x@nongnu.org, Laurent Vivier , qemu-riscv@nongnu.org, "Richard W.M. Jones" , Liu Zhiwei , Aurelien Jarno , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Marcel Apfelbaum , kvm@vger.kernel.org, Christian Borntraeger , Akihiko Odaki , Daniel Henrique Barboza , Hanna Reitz , Ani Sinha , qemu-ppc@nongnu.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Alistair Francis , Bin Meng , "Michael S. Tsirkin" , Helge Deller , Peter Xu , Daniel Henrique Barboza , Dmitry Fleytman , Nina Schoetterl-Glausch , Yanan Wang , qemu-arm@nongnu.org, Igor Mammedov , Jean-Christophe Dubois , Eric Farman , Sriram Yagnaraman , qemu-block@nongnu.org, Stefan Berger , Joel Stanley , Eduardo Habkost , David Gibson , Fam Zheng , Weiwei Li , Markus Armbruster , Pierrick Bouvier Date: Thu, 12 Sep 2024 00:38:33 -0700 . Subject: [PATCH 0/1] Keep transaction attribute in address_space_map() From: "Fea.Wang" To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Paolo Bonzini , Peter Xu , David Hildenbrand , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "Fea.Wang" Date: Thu, 12 Sep 2024 15:04:03 +0800 . Subject: [PATCH 00/10] target/riscv: Add support for Smdbltrp and Ssdbltrp extensions From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Bin Meng Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Ved Shanbhogue , Atish Patra , qemu-devel@nongnu.org Date: Thu, 12 Sep 2024 10:48:19 +0200 . Subject: [PATCH V2] arm/kvm: add support for MTE From: Ganapatrao Kulkarni To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, gustavo.romero@linaro.org, alex.bennee@linaro.org, darren@os.amperecomputing.com, gankulkarni@os.amperecomputing.com Date: Thu, 12 Sep 2024 02:16:16 -0700 . Subject: [PATCH v2 0/5] linux-user/i386: Emulate orig_ax From: Ilya Leoshkevich To: Laurent Vivier , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Richard Henderson Cc: qemu-devel@nongnu.org, Ilya Leoshkevich Date: Thu, 12 Sep 2024 11:28:19 +0200 . Subject: [PATCH v12 00/10] Support persistent reservation operations From: Changqi Lu To: qemu-block@nongnu.org, qemu-devel@nongnu.org Cc: kwolf@redhat.com, hreitz@redhat.com, stefanha@redhat.com, fam@euphon.net, ronniesahlberg@gmail.com, pbonzini@redhat.com, pl@dlhnet.de, kbusch@kernel.org, its@irrelevant.dk, foss@defmacro.it, philmd@linaro.org, pizhenwei@bytedance.com, k.jensen@samsung.com, Changqi Lu Date: Thu, 12 Sep 2024 19:19:07 +0800 . Subject: [PATCH] docs/fuzz: fix outdated mention to enable-sanitizers From: Matheus Tavares Bernardino To: Date: Thu, 12 Sep 2024 09:47:09 -0300 . Subject: [PULL 0/7] loongarch-to-apply queue From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Date: Thu, 12 Sep 2024 20:51:25 +0800 The following changes since commit 4b7ea33074450bc6148c8e1545d78f179e64adb4: Merge tag 'pull-request-2024-09-11' of https://gitlab.com/thuth/qemu into staging (2024-09-11 19:28:23 +0100) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240912 for you to fetch changes up to 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e: hw/loongarch: Add acpi SPCR table support (2024-09-12 20:57:54 +0800) ---------------------------------------------------------------- pull-loongarch-20240912 ---------------------------------------------------------------- Bibo Mao (5): target/loongarch: Add compatible support about VM reboot hw/loongarch: Remove default enable with VIRTIO_VGA device target/loongarch/kvm: Add vCPU reset function target/loongarch: Support QMP dump-guest-memory hw/loongarch: Add acpi SPCR table support Jason A. Donenfeld (2): hw/loongarch: virt: support up to 4 serial ports hw/loongarch: virt: pass random seed to fdt hw/loongarch/Kconfig | 1 - hw/loongarch/acpi-build.c | 63 +++++++++++-- hw/loongarch/virt.c | 33 ++++--- include/hw/pci-host/ls7a.h | 9 +- target/loongarch/arch_dump.c | 167 +++++++++++++++++++++++++++++++++++ target/loongarch/cpu.c | 17 +++- target/loongarch/internals.h | 2 + target/loongarch/kvm/kvm.c | 5 +- target/loongarch/kvm/kvm_loongarch.h | 2 +- target/loongarch/meson.build | 1 + 10 files changed, 274 insertions(+), 26 deletions(-) create mode 100644 target/loongarch/arch_dump.c . Subject: [RFC PATCH 0/5] Specifying cache topology on ARM From: Alireza Sanaee via To: , Date: Thu, 12 Sep 2024 14:38:24 +0100 . Subject: [PATCH 0/3] Document SHMEM vhost-user requests From: Albert Esteve To: qemu-devel@nongnu.org Cc: slp@redhat.com, hi@alyssa.is, mst@redhat.com, stefanha@redhat.com, Stefano Garzarella , david@redhat.com, stevensd@chromium.org, jasowang@redhat.com, Albert Esteve Date: Thu, 12 Sep 2024 16:44:29 +0200 . Subject: [PATCH v3 0/5] vhost-user: Add SHMEM_MAP/UNMAP requests From: Albert Esteve To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , slp@redhat.com, hi@alyssa.is, mst@redhat.com, david@redhat.com, jasowang@redhat.com, stefanha@redhat.com, Stefano Garzarella , stevensd@chromium.org, Albert Esteve Date: Thu, 12 Sep 2024 16:53:30 +0200 . Subject: [PATCH v2] .gitlab-ci.d/crossbuilds.yml: Force 'make check' single-threaded for cross-i686-tci From: Peter Maydell To: qemu-devel@nongnu.org Cc: Thomas Huth Date: Thu, 12 Sep 2024 16:10:03 +0100 . Subject: [PATCH v2 44/48] migration: remove return after g_assert_not_reached() From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Nicholas Piggin , Igor Mammedov , Akihiko Odaki , Weiwei Li , "Maciej S. Szmigiero" , qemu-s390x@nongnu.org, Michael Rolnik , Liu Zhiwei , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Palmer Dabbelt , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Nina Schoetterl-Glausch , Yanan Wang , Marcel Apfelbaum , Dmitry Fleytman , Stefan Berger , Halil Pasic , Paolo Bonzini , Laurent Vivier , Daniel Henrique Barboza , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , kvm@vger.kernel.org, Joel Stanley , qemu-riscv@nongnu.org, Aurelien Jarno , Fabiano Rosas , Eduardo Habkost , Harsh Prateek Bora , Peter Xu , Hyman Huang , Rob Herring , Peter Maydell , Kevin Wolf , Marcelo Tosatti , Eric Farman , Helge Deller , Jesper Devantier , Daniel Henrique Barboza , Fam Zheng , Klaus Jensen , Keith Busch , Zhao Liu , qemu-ppc@nongnu.org, Jean-Christophe Dubois , Christian Borntraeger , David Gibson , WANG Xuerui , Laurent Vivier , Richard Henderson , Markus Armbruster , Sriram Yagnaraman , Bin Meng , Ani Sinha , qemu-block@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , Jason Wang , "Richard W.M. Jones" , "Michael S. Tsirkin" , Hanna Reitz , Corey Minyard , Alistair Francis , Pierrick Bouvier Date: Thu, 12 Sep 2024 09:11:46 -0700 . Subject: [PATCH] ppc/pnv: Add support for TPM with SPI interface From: dan tan To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, pbonzini@redhat.com, stefanb@linux.vnet.ibm.com, thuth@redhat.com, lvivier@redhat.com, clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com Date: Thu, 12 Sep 2024 11:09:59 -0500 . Subject: [PATCH v2 0/2] Move net backend cleanup to NIC cleanup From: =?UTF-8?q?Eugenio=20P=C3=A9rez?= To: Jason Wang , qemu-devel@nongnu.org Cc: dtatulea@nvidia.com, mcoqueli@redhat.com, mst@redhat.com, si-wei.liu@oracle.com, qemu-stable@nongnu.org, leiyang@redhat.com, Ani Sinha Date: Thu, 12 Sep 2024 18:54:06 +0200 . Subject: [PATCH v3 00/14] XIVE2 changes for TIMA operations From: Michael Kowal To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, npiggin@gmail.com, milesg@linux.ibm.com Date: Thu, 12 Sep 2024 15:50:14 -0500 .